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Search Results (2 CVEs found)

CVE Vendors Products Updated CVSS v3.1
CVE-2025-0647 1 Arm 11 C1-premium, C1-ultra, Cortex-a710 and 8 more 2026-01-15 N/A
In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.
CVE-2024-7881 1 Arm 18 C1-premium, C1-premium Firmware, C1-pro and 15 more 2025-12-18 5.1 Medium
An unprivileged context can trigger a data memory-dependent prefetch engine to fetch the contents of a privileged location and consume those contents as an address that is also dereferenced.